1, according to system requirements, the design of the system FPGA program;

2, responsible for the overall design of the FPGA program, module division, the key modules of the logic design, simulation, debugging;

3, determine the principle of the design of the FPGA program, to assist in the schematic design of the relevant FPGA;

4, with the hardware and software designers to complete the relevant mission objectives;

5, the preparation of FPGA design documents, test documents and the use of documents, etc..

1, bachelor degree or above, major in communication, electronics, more than three years working experience;

2, familiar with the FPGA program architecture design, digital intermediate frequency DDC/DUC RTL level design, algorithm implementation, etc.;

3, familiar with the IR protocol, CPRI protocol, the design of high speed AD/DA interface design, familiar with Gigabit Ethernet / Fast Ethernet RTL design, familiar with various types of digital repeater, RRU, multimode system development design;

4, the application of high-speed Serdes (10Gbps), cross clock domain processing, reduce resources, improve clock performance and timing optimization has some research and experience;

5, master xlinx FPGA chip features and VIVADO development environment, proficient in Verilog coding;

6. Good team player and team management skills;

7, project team experience is preferred.